Author: Nick P
Date: December 2, 2009 5:34 PM
Link: http://www.schneier.com/blog/archives/2009/12/the_security_im.html#c401462
Document (TXT):
https://drive.google.com/file/d/0B4jUV_GzprlKUE9FNVkzZW9heUE/view?usp=sharing
Signature (SIG):
https://drive.google.com/file/d/0B4jUV_GzprlKbXRVYnowZHRhdzA/view?usp=sharing
Today, even microcontrollers are fast enough to do crypto or have onboard crypto. Smartcards are custom-designed for that with hardware tamper resistance features. FPGA's as well, although they have more risk from HSA's. An improvement to my old scheme is to use a reliable microcontroller or FPGA to implement the crypto plus zeroize feature.
ReplyDeleteOn that note, look at Air Force Labs HAVEN project below. I designed a deniable computer system around that in the past. The zeroize function wipes high speed RAM at the FPGA level that automatically kills off everything in RAM. Activates same in inline-media encryptor. If done right with an extra mechanism on the host, the FPGA or microcontroller blueprints themselves can be wiped this way so the attacker doesn't learn the details of how it worked. Combined with my polymorphic ciphers & software diversity research, this means the system can be designed where the user doesn't even know what construction was used. (coercion resistant).
http://www.dtic.mil/dtic/tr/fulltext/u2/a501020.pdf